The 450's high reliability was obtained through ECC from the Pentium Pro processor data bus to memory. Ball grid array (BGA) chips use solder balls on the underside of the chip. Chips that use QFA packaging have leads on all four sides of the chip.
Quad flat pack (QFA) is a method used for surface-mounting a chip to a board. Options for QFP or BGA packaging were available on the PCI Bridge and the DP. The 450GX and 450KX North Bridge comprises four individual chip components: an 82454KX/GX PCI bridge, an 82452KX/GX data path (DP), an 82453KX/GX data controller (DC), and an 82451KX/GX memory interface controller (MIC).
The 450GX and 450KX both have full support for ECC memory-a requirement for server and workstation use. The 450KX is the low-end server or workstation (standalone user) version of Orion and, as such, it supports fewer processors (one or two) and less memory (1GB) than the GX. Some vendors, such as ALR, with its Revolution 6圆, designed systems that could use up to six processors using the GX chipset. The GX server chipset was particularly suited to the server role because it supports up to four Pentium Pro processors for SMP servers, up to 8GB of four-way interleaved memory with ECC or parity, and two bridged PCI buses. The 450KX was designed for networked or standalone workstations and is also suitable for low-end servers the more powerful 450GX was designed for servers. Although both are commonly known as Orion, the 450KX was originally known as Mars. The first chipsets to support the Pentium Pro were the 450KX and GX. The following sections examine the server-class chipsets for P6 processors up through the Pentium III. Intel South Bridge/ICH Chips for P6 Class CPUs The ICH2 is also used as part of some of the first seventh-generation (Pentium 4) Intel chipsets. Table 3.9 shows a list of all the Intel South Bridge components used with P6-class processors and their capabilities. Often the same South Bridge or ICH component can be used with several different North Bridge (MCH or GMCH) chipsets. Most recent Intel chipsets for single-processor or dual-processor servers are designed as two-part systems, using a North Bridge (MCH or GMCH in hub-based designs) and a South Bridge (ICH in hub-based designs) component. Therefore, cache characteristics for these machines are not dependent on the chipset but on the processor instead. Pentium Pro, Celeron, and Pentium II/III CPUs have their secondary caches integrated into the CPU package.